RISC-V is coming to the internet of things

Fans of this newsletter know I’m a major chip nerd. I started my tech career as a semiconductor reporter, and for the last seven or eight years I’ve been closely watching RISC-V, an open source chip architecture. The RISC-V architecture, which was developed a decade ago at UC Berkeley, competes with both that of Arm and the x86 architecture from Intel.

Already companies such as Nvidia, Western Digital, Samsung, and Alibaba have been building silicon based on RISC-V for their own internal use. But in the wake of Nvidia’s failed takeover of Arm, a lot of companies took a look at RISC-V and began developing their own strategies around this instruction set, making it a soon-to-be competitor to Arm and Intel. However, it’s not quite ready to take the IoT world by storm just yet.

In mid-month, SiFive, a company that builds RISC-V cores and licenses them out to other businesses that don’t want to tackle that much chip engineering, raised a fifth round of funding that valued it at $2.5 billion. Even more interesting were the companies that were involved in the funding, which included the venture capital divisions of both Intel and Qualcomm.

Intel, long a jealous defender of its x86 architecture as the best and only option for computing, has softened its stance as it has lost ground to Nvidia on the AI side and Arm in mobile and IoT. Now, as it seeks to regain relevance, Intel is embracing the manufacturing of others’ chips and other architectures.

Meanwhile, Arm for the last few years has been adjusting its business model to account for the threat of RISC-V, including making it cheaper and easier for startups and research groups to license Arm cores. The potential for a lower-cost instruction set has led at least one chip startup to try RISC-V, but I don’t know how prevalent that threat really is. And it may be that Arm’s planned acquisition by Nvidia helped push companies to look at RISC-V as an alternative as they worried that Arm might get purchased by a potential competitor.

Chris Jones, vice president of products at SiFive, said the company has fielded a lot of inquiries from worried customers. He also said that RISC-V has a lot of potential room to grow in the IoT sector, especially because the current market is so fragmented with different architectures such as Tensilica, Arm, and others. “Customers are getting a little tired of complex [instruction sets],” he said. “It’s frustrating to switch tools and development environments based on the bit they are programming.”

The chip shortage is also driving some embedded clients to reduce complexity in the types of chips and instruction sets used, since having a few parts can make it easier to swap available chips in and out of a design.

In the IoT word, Jones said the focus so far is on machine learning workloads, some embedded chips, and chips for sensors, especially those requiring some small bit of processing for localized machine learning. As an example, Renesas, this month launched its first 64-bit RISC-V processor for the embedded market. The chip is designed for IoT edge computing in gateways for dedicated security systems, solar inverters, or other jobs.

In some ways, these dedicated gateways and specialized sensors are a perfect place for RISC-V chips because right now there’s no broad software development effort for RISC-V yet. Moreover, without broad software support for RISC-V, every application running on a RISC-V processor needs specialized software, something most users of embedded computers are used to building.

By contrast, developers who work on servers or general purpose computing are used to working on software platforms or programming languages designed to run on x86 or Arm machines. For RISC-V to really take off, we’ll need a software effort that helps adapt popular applications and code for RISC-V.

We saw similar efforts when Arm created Linaro to build compatible software for server applications ahead of its move into the server market, and most recently when Apple built its own chips on the Arm architecture and rewrote its software to run on the new M1 chips.

I expect we’ll see similar software efforts that will support bringing RISC-V to more generic IoT use cases. But we’re not there yet.